Exemplary embodiments relate to a multi-chip package and, more particularly, to a multi-chip package capable of reducing a peak current.
In order to increase the degree of integration and performance of memory chips, stacked memory chips are being developed. That is, 2, 4, or 8 memory chips are stacked in order to increase the degree of integration as compared with a single memory chip.
In general, in a multi-chip package of a plurality of memory chips, the memory chips share a dedicated power supplied to the package.
If the plurality of memory chips perform operations that consume a large current, at the same time, such as bit line precharge operations, a peak current is large since currents overlap each other in time.
In order to address such a feature, a current consumption period may be extended so as to reduce the peak current. In this case, however, the time taken to perform a program operation and the time taken to perform a read operation are increased regardless of a voltage drop.